printf "Compile VHDL Files\n"
if(alcom alu.vhd)	{{printf "Error: alcom alu.vhd\n"}{ exit}}
if(alcom chkalu.vhd)	{{printf "Error: alcom chkalu.vhd\n"}{exit}}

printf "Open VHDL Files\n"
if(opn design -vhdl alu.vhd)	{{printf "Error: opn alu.vhd\n"}{exit}}
if(opn design -vhdl chkalu.vhd)	{{printf "Error: opn chkalu.vhd\n"}{exit}}

printf "Set Target Technology(LCA XC4000)\n"
if(env dst xc4k/default)	{{printf "Error: env dst xc4k\n"}{exit}}

printf "Synthesis\n"
if(syn vhdl work chkalu -arch beha){}{{printf "Error: syn chkalu\n"}{exit}}

printf "Set Device Informations\n"
if(add env -custom device_number "4010" speed_grade -5 package_type "PGA" num_pins "191" temp_range "Commercial  0 to +70 C" enhanced_ce "No" macro_mapping "NONE" macro_mapping_type "AREA" sgconfig_file "PADs on top level, PORTs on other levels"){{printf "Error: Add env XC4010\n"}{exit}}

printf "Optimize\n"
if(opt area -low)	{{printf "Error: opt area\n"}{exit}}

printf "Add IO Buffers\n"
if(opt custom "add_rm_tech_io yes ()  add"){{printf "Error: add IO Buffers"}{exit}}

printf "Insert Global BUffers\n"
if(opt custom "xi_global_ins_del_top clk_only ()  insert"){{printf "Error: Insert Global Buffer\n"}{exit}}

printf "Write XNF\n"
if(opt custom "wr_xnf_nl xnf_chkalu/opt_nl.xnf xnf_chkalu/opt_nl.als no"){{printf "Error: Write XNF\n"}{exit}}

printf "Run Complete\n"
quit



